feat(loader, kernel): impl part of loader and initialize kernel structure

arch/x86_64/boot/include/boot.h

@@ -0,0 +1,6 @@
+#define BOOT_HEAP_SIZE (512 * 1024)
+#define BOOT_STACK_SIZE (64 * 1024)
+#define LOAD_PHYSICAL_ADDR (0x100000)
+
+#define BOOT_PGTABLE_SIZE (32 * 4096)
+#define BOOT_INIT_PGTABLE_SIZE (6 * 4096)

arch/x86_64/boot/include/multiboot2.h

@@ -0,0 +1,39 @@
+#pragma once
+
+/*  How many bytes from the start of the file we search for the header. */
+#define MULTIBOOT_SEARCH                        32768
+#define MULTIBOOT_HEADER_ALIGN                  8
+
+/*  The magic field should contain this. */
+#define MULTIBOOT2_HEADER_MAGIC                 0xe85250d6
+
+/*  Alignment of multiboot modules. */
+#define MULTIBOOT_MOD_ALIGN                     0x00001000
+
+/*  Alignment of the multiboot info structure. */
+#define MULTIBOOT_INFO_ALIGN                    0x00000008
+
+
+#define MULTIBOOT_HEADER_TAG_END  0
+#define MULTIBOOT_HEADER_TAG_INFORMATION_REQUEST  1
+#define MULTIBOOT_HEADER_TAG_ADDRESS  2
+#define MULTIBOOT_HEADER_TAG_ENTRY_ADDRESS  3
+#define MULTIBOOT_HEADER_TAG_CONSOLE_FLAGS  4
+#define MULTIBOOT_HEADER_TAG_FRAMEBUFFER  5
+#define MULTIBOOT_HEADER_TAG_MODULE_ALIGN  6
+#define MULTIBOOT_HEADER_TAG_EFI_BS        7
+#define MULTIBOOT_HEADER_TAG_ENTRY_ADDRESS_EFI32  8
+#define MULTIBOOT_HEADER_TAG_ENTRY_ADDRESS_EFI64  9
+#define MULTIBOOT_HEADER_TAG_RELOCATABLE  10
+
+#define MULTIBOOT_ARCHITECTURE_I386  0
+#define MULTIBOOT_ARCHITECTURE_MIPS32  4
+#define MULTIBOOT_HEADER_TAG_OPTIONAL 1
+
+#define MULTIBOOT_LOAD_PREFERENCE_NONE 0
+#define MULTIBOOT_LOAD_PREFERENCE_LOW 1
+#define MULTIBOOT_LOAD_PREFERENCE_HIGH 2
+
+#define MULTIBOOT_CONSOLE_FLAGS_CONSOLE_REQUIRED 1
+#define MULTIBOOT_CONSOLE_FLAGS_EGA_TEXT_SUPPORTED 2
+

arch/x86_64/boot/include/processor_flags.h

@@ -0,0 +1,15 @@
+#define X86_CR0_PE  0x00000001
+#define X86_CR0_MP  0x00000002
+#define X86_CR0_ET  0x00000004
+#define X86_CR0_NE  0x00000020
+#define X86_CR0_WP  0x00010000
+#define X86_CR0_AM  0x00040000
+#define X86_CR0_PG  0x80000000
+#define CR0_STATE	(X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
+			 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
+			 X86_CR0_PG)
+#define X86_CR4_PAE 0x00000020
+#define X86_CR4_OSFXSR 0x00000200
+#define X86_CR4_OSXMMEXCPT 0x00000400
+#define MSR_EFER       0xc0000080
+#define _EFER_LME   8